Semiconductor manufacturers are continually trying to reduce the size of individual devices within an integrated circuit in order to reduce the overall integrated circuit size. However in doing so, fabrication of the devices becomes more difficult, particularly for complex device types such as bipolar, BiMOS, and BiCMOS devices. In an effort to simplify fabrication of small, complex devices, manufacturers are attempting to incorporate as many self-aligned processing steps as possible in order to reduce the number of masking operations. In the fabrication of semiconductor devices having bipolar transistors, many self-aligned fabrication processes have been demonstrated, yet most bipolar devices formed from these processes also have undesirable levels of base and emitter resistance. Therefore, a need exists for an improved process for forming a bipolar transistor in a semiconductor device. More specifically, a need exists for a fully self-aligned process which forms a bipolar transistor having low base and emitter resistance.